Ladder termination circuit

ABSTRACT

An improved and simplified termination circuit for the ladder portion of a digital to analog converter. the termination circuit includes an amplifier having unity current factor, known ladder termination voltage, and a very low impedance looking from the ladder into the amplifier.

nited States Patent 1191 Cecil 1 Jan. 30, 1973 [54] LADDER TERMINATIONCIRCUIT [56] References Cited [75] Inventor: James Barton Cecil, Tempe,Ariz. UNITED STATES PATENTS 7 Assignee; Motown, Inc Franklin park,3,194,985 7/1965 Smith, Jr. et al ..330/3O D [22] F d March 1971 PrimaryExaminerRoy Lake Assistant Examiner-Lawrence J. Dahl [21] Appl' 127503Attorney-Mueller & Aichele [52] US. Cl. ..330/l9, 330/17, 330/22,ABSTRACT I 330/30 340/347 DA An improved and simplified terminationcircuit for the [5 l] Int. Cl ..H03f 3/68 ladder portion of a digital toanalog converter. the ter- [58] Field of Search ..330/l9, 22, 30 D, 30R; mination circuit includes an amplifier having unity 340/347 DAcurrent factor, known ladder termination voltage, and

a very low impedance looking from the ladder into the amplifier.

6 Claims, 1 Drawing Figure ANALOGUE OUTPUT CONSTANT CURRENT DRIVEPatented Jan. 30, 1973 mm 2. N 2% 3% on MW mmm 8 v om 5%: 565 5.56

INVENTOR JAMES B. CECIL WM M6 ATTY'S.

LADDER TERMINATION CIRCUIT BACKGROUND A digital number is converted inaccordance with the prior art into an analog amount by circuitsemploying a known resistance network which is called a ladder. Thevarious branches of the network or rungs of the ladder carry currentswhich are digitally related and a digital number input causes thecurrent in a rung or rungs of the ladder to flow in an analog outputcircuit. The several rungs are terminated in the prior art byconnections to respective transistors which are operated in a commonbase mode and whose emitter areas are related to the current flow in therespective rungs, whereby the current flow in the several rungs-may beindependent of each other and may be independently connected to theanalog output circuit, so that the current in the analog output circuitmay be controlled in a digital manner. The transistors having variousareas of the emitters are difficult to deposit on a chip with highenough degree of accuracy to provide a low and uniform resistance attheseveral emitters and the same potential at the several emitters, andalso to provide a properly scaled current flow from the severalemitters.

It is an object of this invention to provide an improved terminatingnetwork for the rungs of a digital to analog ladder circuit.

It is another object of this invention to provide a termination networkcomprising an amplifier having a unity amplification factor for currentand produces a known ladder termination voltage and a low resistancewhen seen from the direction of the rungs of the ladder.

SUMMARY According to this invention, the analog output terminal isconnected to the rungs of a ladder by way of separate amplifiers. Eachamplifier, whichis simpler, cheaper to make and more accurate than knownsuch amplifiers, has a one to one current ratio whereby the currentsgoing into and out of the amplifier are equal. The amplifier alsoproduces a known ladder termination voltage whereby an input or biasterminal of the amplifier controls the output voltage at the ladderterminal of the amplifier and also the amplifier is so constructed thatthe ladder terminal into the amplifier sees a low impedance orresistance. The amplifier consists of two transistors, the bases ofwhich are being connected to the collector of the other and the emitterof the one being connected to the base of the other. A constant currentsource supplies current for the collector emitter path of the othertransistor. The current to be amplified flows in the collector toemitter path of the one transistor.

DESCRIPTION The invention will be better understood upon reading thefollowing description in connection with the accompanying drawing, thesingle FlGURE of which illustrates a digital to analog ladder includingthe termination amplifiers of the present invention.

In the FIGURE, a binary number, consisting of the digits, zeros andones, is applied to the several terminals l0, 12, 14 16, 18 and 20. Themost significant digit is applied to the input terminal and the otherdigits are applied in the order of lesser significance to the inputterminals 12, 14, 16, 18 and 20, respectively. The contents of thedotted rectangle 24 and of the rectangles 26, 28, 30, 32 and 34 are thesame. The contents of the rectangle 36 differ from the contents of therectangles 24 to 34 only in that there is no provision for a digitalinput terminal such as the terminals 10 to 20 of the rectangles 24 to 34whereby an output terminal such as 61 is not required for the rectangle36. Therefore, only the contents of the rectangle 24 are described. Theinput terminal 10 is connected to the base of an .NPN transistor 38which acts as a switch. Since all the transistors shown are of the NPNtype, no further mention of the type of transistors will be made in thisdescription. The collector of the transistor 38 is connected to an inputterminal 40 to which the positive terminal of the power supply source(not shown) is to be connected. The emitter of the transistor 38 isconnected to the cathode of a diode 42 and to the collector of atransistor 44. (In the rectangle 36, no transistor 38 or diode 42, whichcomprise switching means, or input terminal such as 10 need be providedand the terminal 40 is connected directly to the collector of atransistor such as the transistor 44.) The base of the transistor 44 isconnected to a terminal of a constant current source 46 and to thecollector of transistor 48. The emitter of the transistor 44 isconnected to the base of the transistor 48 and to a ladder terminal 50of the amplifier in the rectangle 24. A voltage supply terminal 52 isconnected at the other terminal thereof to the constant current source46. The connection 61 to the anode of the diode 42 is the output of theamplifier 24. Each of the amplifiers comprising the elements 44, 46 and48 as well as the switch which comprises the elements 38 and 42 in therectangles 26 to 34 are, as has been noted, identical with the amplifier24. However, only the input terminals 12 to 20, the bias terminals 56,the ladder terminals 50, the supply terminals 40 and the outputterminals 61 are shown for the rectangles 26 to 34 and, for therectangle 36, the input terminal and the output terminal 61 are omitted.All the terminals 61 are connected to the analog terminal 62 whereby thecurrent at the terminal 62 is the sum of the current from the severalterminals 61 as controlled by the digital inputs 10 to 20.

While the ladder network having branches or rungs is well known, it isdescribed for completeness. The ladder terminals 50 of the amplifiers24, 26, 28, 30, 32, 34 and 36 are connected to one terminal of therespective resistors 64, 66, 68, 72, 74 and 76. The other terminal ofthe resistor 64 is connected to one terminal of constant current device77 whose other terminal is connected to the other terminal of the source(not shown) which is connected to the terminal 40. The said otherterminal of the resistor 64 is connected to the other terminal of theresistor 66 by way of a resistor 78. The other terminals of theresistors 66 and 68 are connected by way of resistor 80. The otherterminals of the resistors 68 and 70 are connected by way of resistor82. The other terminal of the resistors 70 and 72 are connected by wayof resistor 84. The other terminals of the resistors 72 and 74 areconnected by way of resistor 86, and the other terminals of theresistors 74 and 76 are connected by way 'of a resistor 88. Then, if theresistance of the resistors 64, 66, 68, 70, 72 and 74 are each equal totwice the resistances of resistors 76, 78,

80, 82, 84, 86 and 88, then the conventional current flowing out of theterminals 50 of the rectangles 24, 26, 28, 30, 32, 34 and 36 are equalto 321, 161, 81, 41, 21, I and 1, respectively where the constantcurrent drive 77 is equal to 641. As noted above, there is no terminal61 for the rectangle 36, whereby when digital zeros (using positivelogic) are applied to all the digital input terminals 10, 12, 14, 16, 18and 20, 631 current flows in the analog terminal 62 and when digitalones are applied to the terminals l0, 12, 14, 16, 18 and 20 no currentflows in the digital output terminal 62 and, similarly for any binarynumber applied to the terminals 10, 12, 14, 16, 18 and 20, the mostsignificant digit being applied to the terminal 10, as noted above, thecurrent flow in the analog terminal 62 is determined by the value of thebinary number.

Having explained the general operation of digital to analog converters,the operation of the amplifier included in the rectangle 24 is nowdescribed. As noted, the transistor 38 and the diode 42 comprise aswitch and are not part of the amplifier. As noted above, conventionalcurrent flows from the terminal 40, through the collector to emitterpaths of the transistors 38 and 44 in series to the ladder terminal 50when a binary one is applied to the base of the transistor 38, and thiscurrent flows from the terminal 62 through the diode 42 through thecollector to emitter path of the transistor 44 and through the terminal50 when the transistor 38 is blocked by the application of a negativevoltage with respect to the voltage at the terminal 62 indicating abinary zero applied to the base thereof, and the other amplifiersincluded in the rectangles 26 to 34 operate similarly. The ratio of thecurrent flow at the collector of the transistor 44 to that at theterminal 50 for each of the amplifiers in the rectangles 24 to 34 mustbe unity at all times for the digital to analog converter to operateproperly. That is, the current at the collector of the transistor 44must always be equal to the current at the terminal 50 and to accomplishthis result, the amplifiers in the rectangles 24 to 34, must have acurrent amplification value of unity.

Since'both of the transistors 44 and 48 have high Betas, (on the orderof 100), and since the current supplied by the source 46 is small, thebase current for the transistor 48 is very small. Furthermore due to thehigh Beta of the transistor 44, the base current for this transistor isalso small. Therefore, the collector current of the transistor 44 issubstantially equal to the current at terminal 50. Also, it will benoted that some of the current flow out of the emitter of the transistor44 is derived from the base thereof whereby the current at the emitterof the transistor 44 is greater than the current at the collectorthereof. At least some of this additional current (which is very small)is used to supply base current for the transistor 48 and therefore doesnot appear at the terminal 50. Therefore, due to the two cooperatingeffects, the current amplification of the amplifier in the rectangles24-34 are all equal to unity.

As is required for proper operation of the ladder, the voltage at allthe ladder terminals 50 is maintained at the same voltage, the voltagebeing related to the voltage of the bias terminal 56. This isaccomplished as follows.

it will be noted that the collector to emitter current for thetransistor 48 is supplied by a constant current source 46. Due to thehigh beta of transistor 44, a small amount of the current provided bythe constant current source 46 is used as base current for thetransistor 44. Since this base current is very low, the current flowingout of the emitter of the transistor 48 is constant and is very nearlyequal to the current supplied by the constant current source 46. Aconstant desired bias voltage is connected to the bias terminal 56,whereby the voltage at the base of the transistor 48, and therefore atthe terminal 50 of the amplifier 24, differs from the voltage at theterminal 58 by the emitter. to base drop of the transistor 48. Sinceeach of the amplifiers 26, 28, 30, 32 and 34 and 36 contain similarcircuits and since corresponding elements in the several amplifiers areas nearly identical as the state of the art will permit, and since theterminals 56 are all connected together, the voltage at the terminal 50of all the amplifiers 24, 26, 28, 33, 34 and 36 are the same.

Furthermore, the resistance of the amplifiers 24 to 36 is low lookinginto the amplifiers from the ladder terminals 50. This is due to thefact that the terminal 50 is connected to a base of a transistor 48 andto the emitter of another transistor 44. Due to the negative feedbackproduced by the connection of the transistors 44 and 48, as is wellknown, the resistance of the amplifiers in the rectangles 24 to 36 islow. Since thisresistance is low with respect to the resistance of theladder elements 64 to 88 the ladder can be accurately constructedwithout the necessity of taking into account large amplifierresistances.

While a 6 bit ladder is shown, the number of bits can be made as greator as small as desired by, adding or subtracting amplifiers and laddersections. While NPN transistors are shown, PNP transistors may besubstituted therefore in a known manner. While this invention is bestsuited to be put on a chip, discrete elements may be used if desired.

What is claimed is:

' 1. An amplifier having unity current amplification between a firstcurrent supply terminal and a network terminal and which provides lowresistance at said network terminal to circuits connected to saidnetwork terminal comprising first and second transistors each having acollector,

an emitter and a base,

constant current source means for feeding a constant current to thecollector of said first transistor, means for connecting the collectorof said first transistor to the base of said second transistor, meansfor connecting the base of said first transistor to the emitter of saidsecond transistor,

means for connecting the emitter of said first transistor to a biasterminal,

switch means coupled between said first current supply terminal and thecollector of said second transistor,

a second current supply terminal,

diode means coupled between said second current supply terminal and thecollector of said second transistor, and

means for connecting the base of said first transistor and the emitterof said second transistor to said network terminal.

2. The invention of claim 1 wherein said switch means comprises a thirdtransistor, the emitter of which is connected to the collector of saidsecond transistor, the collector of which is connected to the firstcurrent supply terminal and the base of which is adapted to receiveswitching signals, and said diode means is connected to conduct currentfrom said second current supply terminal to the collector of said secondtransistor.

3. The invention of claim 1 in which said first and second transistorsare NPN transistors.

4. The invention of claim 1 further including second constant currentsource means coupled to said network terminal.

5. The invention of claim 2 wherein said first, second and thirdtransistors are NPN transistors and further including second constantcurrent source means coupled to said network terminal to draw currenttherefrom, and said diode means comprises a diode with the anode thereofconnected to said second current supply terminal and with the cathodethereof connected to the collector of said second transistor and theemitter of said third transistor.

6. The invention of claim 5 wherein the Beta of said first and secondtransistors is of the order of and the current of said first constantcurrent source means is small relative to the current of said secondconstant current source means.

1. An amplifier having unity current amplification between a firstcurrent supply terminal and a network terminal and which provides lowresistance at said network terminal to circuits connected to saidnetwork terminal comprising first and second transistors each having acollector, an emitter and a base, constant current source means forfeeding a constant current to the collector of said first transistor,means for connecting the collector of said first transistor to the baseof said second transistor, means for connecting the base of said firsttransistor to the emitter of said second transistor, means forconnecting the emitter of said first transistor to a bias terminal,switch means coupled between said first current supply terminal and thecollector of said second transistor, a second current supply terminal,diode means coupled between said second current supply terminal and thecollector of said second transistor, and means for connecting the baseof said first transistor and the emitter of said second transistor tosaid network terminal.
 1. An amplifier having unity currentamplification between a first current supply terminal and a networkterminal and which provides low resistance at said network terminal tocircuits connected to said network terminal comprising first and secondtransistors each having a collector, an emitter and a base, constantcurrent source means for feeding a constant current to the collector ofsaid first transistor, means for connecting the collector of said firsttransistor to the base of said second transistor, means for connectingthe base of said first transistor to the emitter of said secondtransistor, means for connecting the emitter of said first transistor toa bias terminal, switch means coupled between said first current supplyterminal and the collector of said second transistor, a second currentsupply terminal, diode means coupled between said second current supplyterminal and the collector of said second transistor, and means forconnecting the base of said first transistor and the emitter of saidsecond transistor to said network terminal.
 2. The invention of claim 1wherein said switch means comprises a third transistor, the emitter ofwhich is connected to the collector of said second transistor, thecollector of which is connected to the first current supply terminal andthe base of which is adapted to receive switching signals, and saiddiode means is connected to conduct current from said second currentsupply terminal to the collector of said second transistor.
 3. Theinvention of claim 1 in which said first and second transistors are NPNtransistors.
 4. The invention of claim 1 further including secondconstant current source means coupled to said network terminal.
 5. Theinvention of claim 2 wherein said first, second and third transistorsare NPN transistors and further including second constant current sourcemeans coupled to said network terminal to draw current therefrom, andsaid diode means comprises a diode with the anode thereof connected tosaid second current supply terminal and with the cathode thereofconnected to the collector of said second transistor and the emitter ofsaid third transistor.